RISC-V
Processors · 5 specs
Direct Answer
RISC-V is a free, open-source RISC instruction set architecture developed starting in 2010 at UC Berkeley -- unlike ARM or x86, it can be implemented without paying any licensing royalty. It's currently most common in microcontrollers and embedded systems, with higher-performance implementations for mobile, desktop, and server use still in development.
Source: UC Berkeley, 2010 · Last reviewed Aug 28, 2026
Specs
| Type | Open-source, royalty-free RISC architecture |
| Origin | UC Berkeley, 2010 |
| Specification Published | 2011 |
| Governing Body | RISC-V Foundation formed 2015; reorganized as RISC-V International (Switzerland), 2020 |
| Current Primary Use | Microcontrollers and embedded systems |
Free as in No Royalty
RISC-V began in 2010 at UC Berkeley, the fifth generation of RISC processor research the university had pursued since 1981. Krste Asanovic developed the initial instruction set with several graduate students over what he described as a three-month summer project, with the specification published in 2011; the RISC-V Foundation formed in 2015 to govern the standard, later reorganizing as RISC-V International, based in Switzerland, in 2020.
What sets RISC-V apart from both ARM and x86 is licensing: it's a free, open standard that anyone can implement in silicon without paying a royalty, unlike ARM's paid licensing model or x86's effectively closed ecosystem controlled by Intel, AMD, and their cross-licensing partners. Real-world adoption today is concentrated in microcontrollers and embedded systems -- companies including SiFive, Alibaba, and Espressif Systems build RISC-V chips for this space -- while higher-performance implementations aimed at mobile, desktop, and server computing remain an active but comparatively young area of development.