GDDR6X vs. HBM
Comparing 2 standards across 8 specifications. 8 key differences identified.
GDDR6X is not a JEDEC standard -- it's a proprietary memory technology Micron developed specifically in collaboration with Nvidia, first shipping in 2020 with the RTX 3080 and RTX 3090. It uses PAM4 signaling, the same two-bit-per-symbol approach PCIe 6.0 later adopted, to reach 19-21 Gbit/s per pin.
HBM (High Bandwidth Memory), standardized by JEDEC in October 2013, takes a fundamentally different approach from GDDR -- stacking multiple DRAM dies vertically and connecting them via through-silicon vias next to the GPU on a silicon interposer, trading GDDR's narrower, faster-clocked bus for a much wider, slower one. Manufacturing cost has kept it mostly in high-end compute GPUs rather than mainstream cards.
Specification Comparison Table
8 Parameters| Parameter / Spec | ||
|---|---|---|
|
Standard
|
Proprietary (Micron, developed with Nvidia) -- not JEDEC | — |
|
Signaling
|
PAM4 (2 bits per symbol, vs. GDDR5/6's 1-bit NRZ) | — |
|
Max Bandwidth / Data Rate
|
19–21 Gbit/s per pin | — |
|
Introduced
|
2020 (Nvidia RTX 3080 and RTX 3090) | — |
|
JEDEC Standard
|
— | October 2013 (JESD235) |
|
Architecture
|
— | Vertically stacked DRAM dies, through-silicon vias (TSVs), silicon interposer |
|
Bus Width (4-Hi Stack)
|
— | 1024-bit (8 x 128-bit channels) |
|
Typical Use
|
— | High-end compute/datacenter GPUs, not mainstream consumer cards |