CAN Bus vs. CAN FD
Comparing 2 standards across 12 specifications. 12 key differences identified.
Controller Area Network (CAN Bus, invented by Robert Bosch GmbH in 1986 and standardized under ISO 11898) is the multi-master, message-broadcast serial bus governing electronic control units (ECUs). Operating at 500 kbps (High-Speed CAN) over a twisted pair with 120-ohm termination resistors, utilizing differential voltage signaling (CAN_H / CAN_L) and non-destructive bitwise arbitration.
CAN FD (Controller Area Network with Flexible Data-Rate, developed by Bosch in 2012 and standardized under ISO 11898-1:2015) extends classical CAN bus to overcome bandwidth bottlenecks in modern vehicles. Increasing payload size from 8 bytes to 64 bytes and accelerating data transmission during the data phase from 500 kbps up to 2, 5, or 8 Mbps.
Specification Comparison Table
12 Parameters| Parameter / Spec | ||
|---|---|---|
|
Standardization
|
ISO 11898-2 (High-Speed physical medium) / SAE J2284 | ISO 11898-1:2015 (Standardized CAN FD) |
|
Transmission Speed
|
500 kbps standard for powertrain (Engine, Transmission, ABS, Airbag); 125-250 kbps for body electronics | — |
|
Differential Voltage Levels
|
Recessive state (Logic 1): CAN_H = 2.5V, CAN_L = 2.5V (Diff = 0V) | Dominant state (Logic 0): CAN_H = 3.5V, CAN_L = 1.5V (Diff = 2.0V) | — |
|
Bus Termination
|
Exactly two 120 Ω terminating resistors at opposite physical ends of the bus (total measured resistance between CAN_H & CAN_L = 60.0 Ω) | — |
|
Frame Format (CAN 2.0B)
|
11-bit standard identifier or 29-bit extended identifier with up to 8 data payload bytes | — |
|
Bitwise Arbitration
|
Dominant zero bits overwrite recessive one bits; the lowest numerical CAN ID has the highest priority and never loses arbitration | — |
|
Fault Confinement
|
Hardware error counters automatically transition faulty nodes from Error-Active -> Error-Passive -> Bus-Off isolation | — |
|
Data Payload Capacity
|
— | Expanded from 8 bytes (Classic CAN) up to 64 bytes per frame (eightfold increase) |
|
Dual Bit-Rate Architecture
|
— | Arbitration Phase: 500 kbps (preserves long wire distance and arbitration) | Data Phase: Switched to 2 Mbps, 5 Mbps, or 8 Mbps |
|
Bit Rate Switch (BRS) Bit
|
— | Single control bit in header switches transceiver clock into high-speed mode and back after CRC |
|
CRC Integrity Protection
|
— | 17-bit CRC for payloads up to 16 bytes; 21-bit CRC for payloads up to 64 bytes (with 4-bit stuff-count field) |
|
Modern Vehicle Deployments
|
— | Mandatory in modern ADAS radar/camera fusion, encrypted gateway security, and EV battery management systems (BMS) |